Embedded Engineer - RTL/SOC Verification (3-7 Yrs) Bangalore/Chennai/Hyderabad/Noida (Semiconductor/VLSI/EDA)

Description : - Good in programming: System Verilog, PERL/Shell script - OVM/UVM Methodology knowledge and experience - Excellent hands-on debug skills and problem-solving attitude - Must have good knowledge on the verification flows - Experience of working in complex test-bench/model in Verilog, System Verilog (SV) - Experience of working on Functional Verification, SoC Verification - Scope of projects: Interface IP subsystems usually including one or more controllers, one or more PHYs, custom logic usually developed by Synopsys, glue logic - Protocols: DDR, USB, PCIE, Ethernet, HDMI, DisplayPort, MIPI CSI and DSI - Expertise: UVM test bench development, test case development, verification plan development, debug, etc.

Required Skills : English